An analog-to-digital (A/D) conversion circuit that converts an analog input signal to a digital output signal is used in various fields. For example, a microcomputer or a system LSI includes a successive approximation register (SAR) A/D conversion circuit, which is a successive approximation type A/D conversion circuit. This A/D conversion circuit includes a charge redistribution type digital-to-analog (D/A) converter. The D/A converter includes binary-weighted capacitors. The capacitors are charged in accordance with the capacitance ratio of the capacitors. The A/D conversion circuit compares a common voltage with the output voltage of the D/A converter, which is output in accordance with the capacitance ratio of the capacitor. The A/D conversion circuit repeats the comparison from an upper order bit to a lower order bit of the digital output signal to determine the bit value of the digital output signal. Japanese Laid-Out Patent Publication No. 7-86947, Japanese Laid-Out Patent Publication No. 2011-120001, and Tomohiko Ogawa, et al., “Non-binary SAR ADC with Digital Error Correction for Low Power Applications”, Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on Date 6-9 Dec. 2010 describe examples of successive approximation type A/D conversion circuits.
In the A/D conversion circuit, due to manufacturing differences, the capacitance of each capacitor may differ from the design value. The difference in the actual capacitance from the design value is referred to as a capacitor mismatch. A capacitor mismatch affects the properties of the digital output signal, for example, the differential non-linearity (DNL) of the digital output signal. Japanese Laid-Out Patent Publication No. 7-86947 describes a method for correcting such a capacitor mismatch. In this case, a correction capacitor is coupled to a node that generates voltage corresponding to an analog input voltage and a reference voltage to adjust the potential at the node with a correction value that corresponds to the capacitor mismatch.
However, in such a correction method, a correction value is calculated whenever determining each bit value of the digital output signal. The time required to calculate the correction value lengthens the A/D conversion time.